New phased array radar architectures: Page 2 of 4

August 20, 2018 // By Peter Delos
A large proliferation of digital beamforming phased array technology has emerged in recent years. The technology has been spawned by both military and commercial applications, along with the rapid advancements in RF integration at the component level.

Analog versus digital beamforming challenges


Figure 3: Digital beamforming antenna pattern.

The objective of a digital beamforming phased array is the simultaneous generation of many antenna patterns for a single set of receiver data. Figure 3 shows the antenna patterns at an element, the combined elements in a subarray, and the beamformed data at the antenna level. The primary obstacle of the subarrayed approach is that beamformed data must be within the pattern of the subarray. With a single subarray, simultaneous patterns cannot be generated at widely different angles.

It would be desirable to eliminate the analog beamformer and produce an every element digital beamforming system and with today’s technology, this is now possible at L- and S-band. At higher frequencies, size and power constraints often necessitate some level of analog beamforming. However, the quest remains to approach near elemental digital beamforming, which places significant demands on the waveform generators and receivers. While the beamforming challenges place demands on the waveform generators and receivers to reduce size and power, there is a simultaneous demand to increase bandwidth for most system applications. These objectives work against each other, as increased bandwidth typically requires additional current and additional circuit complexity. Digital beamforming relies on the coherent addition of the distributed waveform generator and receiver channels. This places additional challenges on both synchronization of the many channels and system allocations of noise contributions.


Table 1: Receiver architecture options.

 

RF signal chains

Table 1 shows some of the most common receiver architectures in use today. The superheterodyne, direct sampling, and direct conversion architectures form the basis of most RF systems. Although only the receiver is shown, the topologies also apply to the waveform generator signal chains.

The superheterodyne approach, which has been around for a hundred years now, is well proven and provides exceptional performance. Unfortunately, it is also the most complicated. It typically requires the most power and the largest physical footprint relative to the available bandwidth, and frequency planning can be quite challenging at large fractional bandwidths. The direct sampling approach has long been sought after, the obstacles being operating the converters at speeds commensurate with direct RF sampling and achieving large input bandwidth.

Today, converters are available for direct sampling in higher Nyquist bands at both L- and S-band. In addition, advances are continuing with C-band sampling soon to be practical, and X-band sampling to follow. Direct conversion architectures provide the most efficient use of the data converter bandwidth. The data converters operate in the first Nyquist, where performance is optimum and low-pass filtering is easier. The two data converters work together sampling I/Q signals, thus increasing the user bandwidth without the challenges of interleaving. The dominant challenge that has plagued the direct conversion architecture for years has been to maintain I/Q balance for acceptable levels of image rejection, LO leakage, and dc offsets.

In recent years, the advanced integration of the entire direct conversion signal chain, combined with digital calibrations, has overcome these challenges, and the direct conversion architecture is well positioned to be a very practical approach in many systems. Here at Analog Devices, we are continually advancing the technology for all the signal chain options described. The future will bring increased bandwidth and lower power, while maintaining high levels of performance, and integrating complete signal chains in system on chips (SoC), or system in packages (SiP) solutions.

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